CPU Core Senior Physical Design Engineer (VLSI)

TL;DR

CPU Core Senior Physical Design Engineer (VLSI): Performing physical design implementation of custom CPU designs from RTL to GDS with an accent on synthesis, place and route, and signoff verification. Focus on optimizing power, frequency, and area while collaborating with EDA vendors to enhance tool capabilities.

Location: Hybrid (Folsom, California, US)

Salary: $164,470–$232,190 USD

Company

hirify.global's Silicon and Platform Engineering Group delivers breakthrough silicon and platform solutions to define next-generation computing experiences.

What you will do

• Perform physical design implementation of custom CPU designs from RTL to GDS to create manufacturing-ready databases.
• Execute the full CPU physical design flow, including synthesis, place and route, clock tree synthesis, and floor planning.
• Conduct comprehensive verification and signoff, including formal equivalence, static timing analysis, and power integrity.
• Collaborate with logic, circuit, architecture, and design automation teams to improve future CPU microarchitectures.
• Partner with industry EDA vendors to enhance tool capabilities for high-speed, low-power synthesizable CPUs.
• Optimize design parameters specifically for power, frequency, and area.

Requirements

• Bachelor's degree in Computer Engineering, CS, Electrical Engineering, or STEM with 6+ years of experience (or Master's with 4+ years).
• Expertise in VLSI circuit design and synthesis.
• Proficiency in Static Timing Analysis (STA).
• Experience with low power design.
• Must be based in or able to work from Folsom, California in a hybrid model.

Nice to have

• Experience with x86 CPU architecture.
• Programming proficiency in Tcl, Perl, or Python.

Culture & Benefits

• Competitive pay and stock bonuses.
• Comprehensive health, retirement, and vacation benefit programs.
• Hybrid work model allowing a split between on-site and off-site work.