Forward Error Correction Intern (Embedded)

TL;DR

Forward Error Correction Intern (Embedded): Designing and validating FEC and DSP schemes for optical coherent transceivers with an accent on hardware implementation and system modeling. Focus on developing simulation software and ensuring the reliability of critical hardware blocks for high-speed communication systems.

Location: Cordoba, Argentina

Company

hirify.global is a global leader in semiconductor solutions, providing the essential building blocks for data infrastructure across cloud, AI, and enterprise architectures.

What you will do

• Design and validate DSP and FEC algorithms for optical communications.
• Develop digital implementation architectures for hardware blocks.
• Create software for the simulation of complex communication systems.
• Collaborate with engineering teams to solve optimization challenges.
• Ensure the reliability of hardware components implemented in ASICs.

Requirements

• Must be currently pursuing a BS, MS, or PhD in Electronics, Computing, or Telecommunications.
• Proficiency in C, C++, Python, Verilog, and SystemVerilog.
• Knowledge of digital communication systems and system modeling.
• Strong written and oral communication skills.
• Must be eligible to access export-controlled information under U.S. law.

Culture & Benefits

• Work in a collaborative, transparent, and inclusive environment.
• Access to advanced technology and industry-leading expertise.
• Opportunities for professional growth and development within a global semiconductor company.

Hiring process

• Interviews are conducted to evaluate individual experience and thought processes in real time.
• Use of AI tools during interviews is strictly prohibited and will result in disqualification.