Failure Analysis And TEM Engineer (Semiconductor)

TL;DR

Failure Analysis and TEM Engineer (Semiconductor): Developing and optimizing failure analysis workflows using Transmission Electron Microscopy to support technology development and yield improvement. Focus on operating state-of-the-art TEM equipment, interpreting complex results, and translating data for FAB process teams.

Location: On-site in Kiryat-Gat, Israel

Company

hirify.global Foundry focuses on state-of-the-art semiconductor manufacturing, delivering cutting-edge silicon process and packaging technology for the AI era.

What you will do

• Define TEM workflow strategies and prepare plans for the sample preparation team.
• Operate TEM microscopes and other laboratory equipment hands-on.
• Interpret complex TEM results to provide actionable data for FAB process and integration teams.
• Develop and improve new workstreams and techniques for material characterization.
• Mentor TEM preparation technicians.
• Collaborate with multi-functional and multi-cultural teams to facilitate yield ramp-up.

Requirements

• Master's or PhD degree in science and engineering.
• At least 2 years of experience in a TEM engineering laboratory or semiconductor field (student experience included).
• Must be based in or able to work on-site in Kiryat-Gat, Israel.
• Availability to work weekends based on business needs.
• Strong analytical problem-solving and oral/written communication skills.

Nice to have

• PhD in a science and engineering major.
• 5+ years of experience operating Transmission Electron Microscopes.
• Expertise in various TEM sample preparation methods and strong interpretation skillsets.
• Understanding of FinFET technology architecture.
• Knowledge of wafer fabrication and general microelectronics.

Culture & Benefits

• Access to state-of-the-art laboratory workflows with a high level of autonomy.
• Work in a dynamic team supporting critical technology development and yield improvement.
• Opportunity to work within a worldwide factory network in a multi-cultural environment.
• Engagement with cutting-edge silicon process and packaging technology for the AI era.