Fpga Implementation Engineer

TL;DR

FPGA Implementation Engineer: Performing synthesis of ASIC designs onto FPGA platforms and ensuring design quality with an accent on FPGA prototyping systems and improvements in prototyping methodology. Focus on porting ASIC-specific code, running functional tests, and performing static timing analysis for complex ASIC designs.

Location: Austin, Texas. Must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.

Company

hirify.global solves complex challenges with innovative end-user solutions for the world's top consumer brands.

What you will do

• Deliver FPGA Platforms to internal groups to enable software development, and hardware-software pre-silicon validation.
• Port ASIC-specific code and models into FPGA-friendly models.
• Define and run functional tests to prove the FPGA builds prior to FPGA distribution.
• Perform FPGA synthesis, Implementation and Static Timing Analysis for complex ASIC designs.
• Test the digital chip RTL from a user perspective on FPGA platforms.
• Design and implement equivalent analog models to model the final ASIC analog front end.

Requirements

• Master's degree in Electrical Engineering, Computer Science, or similar field.
• Experience using FPGAs and an understanding of how FPGA design differs from ASIC design.
• Proficient in operating the simulation and modeling equipment including the design tools.
• Knowledge of Verilog, System Verilog, and digital design concepts.
• Verification/validation techniques and methodologies, including strong debugging skills.
• Familiar with common on-chip bus protocols such as AMBA (AXI, AHB, APB) and communication protocols such as SPI, I2C, I2S, and UART.
• Experience with Scripting for Hardware development (Python/Tcl).

Nice to have

• Experience in FPGA flows - Synthesis, Place & Route, and Timing closure, with emphasis on Synopsys Synplify and Xilinx Vivado.
• Understanding of common FPGA primitives such as memories, I/O pads, BUFG, and MMCMs.
• Experience with Object-oriented programming (OOP) in Python.
• Experience with Floorplanning and advanced timing closure techniques.
• Familiar with lab equipment such as Oscilloscope, Signal Generators and Logic Analyzers.
• Solid documentation, communication, and interpersonal skills.
• Work to tight and variable time scales.

Culture & Benefits

• Award-winning culture built on a foundation of inclusion and fairness.
• Meaningful community engagement.
• Delivering enjoyable employee experiences.