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3 месяца назад

Collective Communication Library Engineer (AI)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
SK
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR

Collective Communication Library Engineer (AI): Designing and implementing key components of a collective communication library tailored for NPU architecture with an accent on performance optimization and interconnect topology. Focus on analyzing performance bottlenecks, defining APIs, and collaborating on future NPU interconnect architecture.

Location: Seongnam, South Korea (On-site)

Company

hirify.global is an AI semiconductor company building specialized NPUs for high-performance computing.

What you will do

  • Design and implement core components of a new collective communication library optimized for NPU architecture.
  • Contribute to the technical design, API definition, and performance tuning of communication protocols.
  • Collaborate with hardware and software engineering teams to identify performance bottlenecks.
  • Influence the evolution of future NPU and interconnect architectures.

Requirements

  • Master’s degree in Computer Science, Computer Engineering, or related field.
  • Minimum 5 years of professional experience in high-performance systems software development.
  • Solid understanding of collective communication algorithms (All-Reduce, All-Gather, Reduce-Scatter).
  • Proficiency in low-level systems programming using C/C++.
  • Strong knowledge of OS internals and networking fabrics such as RDMA/RoCE.
  • Understanding of interconnect topologies and Network-on-Chip (NoC) architectures.

Nice to have

  • Ph.D. in HPC, Parallel Computing, or Computer Architecture.
  • Experience contributing to communication libraries like NCCL or MPI.
  • Performance analysis and optimization experience for AI accelerators such as GPUs or NPUs.

Culture & Benefits

  • Work at the cutting edge of AI hardware and software co-design.
  • Opportunities to solve complex architectural challenges for next-generation AI infrastructure.
  • Collaborative R&D environment working closely with hardware architects.

Hiring process

  • Document screening followed by an online interview (including culture fit and coding assessment).
  • On-site interview process.
  • Final compensation negotiation and offer.

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