TL;DR
Physical Design Engineer (Fintech): Participating in or leading next-generation physical design, methodology, and flow development in advanced technology nodes with an accent on low power and high speed design. Focus on physical design implementation, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification, EM/IR signoff, and DFM Closure.
Location: Mount-Royal (Montreal), Toronto
Company
hirify.global hires and develops leaders and innovators who want to make an impact on the world of technology.
What you will do
- Participate in or lead next-generation physical design, methodology, and flow development in advanced technology nodes.
- Perform physical design implementation, including floor planning, power grid design, place and route.
- Work on clock tree synthesis, timing closure, power/signal integrity signoff.
- Handle physical verification (DRC/LVS/Antenna), EM/IR signoff, and DFM Closure.
- Collaborate closely with the RTL design team & Analog Team to ensure successful tapeouts.
Requirements
- Bachelor or above degree in majors of EE/CS/IT.
- 5+ years of work experience.
- Extensive knowledge of the design rule for the process of N7/N5 and below.
- Knowledge of scripting languages and use in methodology.
- Ability to fix physical design violations, including: DRC, DFM, LVS, ANT, ERC etc.
- Deep experience of static timing analysis.
- High level of communication and teamwork.
- Carefulness, responsibility, and persistence.
Culture & Benefits
- We’re doing work that matters. Help us solve what others can’t.
- We welcome applications from candidates with disabilities and in equity seeking groups.
- If you have accessibility needs during the application and interview process, we encourage you to make your needs known.
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