Senior Verification Engineer (ASIC)

TL;DR

Senior Verification Engineer (ASIC): Developing and executing scalable verification strategies for complex semiconductor products with an accent on UVM methodologies and coverage-driven verification. Focus on defining verification plans, implementing testbenches, and resolving complex pre-silicon bugs in a fast-paced hardware development environment.

Location: Must reside and work in Canada

Salary: CAD 153,910–217,280

Company

hirify.global is a leading global technology organization focused on semiconductor product development and scalable engineering solutions.

What you will do

• Define and implement scalable, reusable verification plans and test environments for blocks, subsystems, and SoCs.
• Lead technical reviews with design and architecture teams to validate test strategies and proofs.
• Execute simulations to identify bugs, analyze power/performance, and implement corrective measures.
• Collaborate with RTL, SoC architecture, and physical design teams to optimize complex features.
• Continuously improve verification methodologies and infrastructure for future products.
• Mentor junior engineers and foster a collaborative, innovative team environment.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related STEM field.
• 5+ years of experience in ASIC/FPGA design verification.
• Proficiency in UVM and/or Formal based verification architectures.
• Hands-on experience with simulators like Synopsys VCS or Cadence Xcelium.
• Strong scripting skills in Python, TCL, and Shell.
• Must live and work in Canada, as remote work from other countries is not permitted.

Nice to have

• Post-graduate degree in a relevant STEM field with 8+ years of industry experience.
• Experience with low-power verification (UPF) and protocols like PCIe, DDR, or UCIe.
• Processor-based verification experience using C/C++.
• Expertise in defining testbench architecture and constrained random verification methodologies.

Culture & Benefits

• Collaborative and innovative environment focused on cutting-edge semiconductor development.
• Opportunities to mentor talent and lead technical verification execution.
• Support for professional growth and career advancement.
• Flexible work-from-home model with occasional site visits based on business needs.