Asic Design Verification Engineer (AI/ML)

TL;DR

ASIC Design Verification Engineer (AI/ML): Verifying new designs for Ethernet systems that accelerate AI/ML workflows with an accent on constrained random verification methodologies and coverage closure. Focus on using System Verilog and UVM to verify new designs.

Location: USA-CA Irvine Alton Parkway Bldg 2, USA-MA-Andover-Brickstone Square-Suite 101, USA-CO Broomfield

Salary: $108,000 - $172,800

Company

hirify.global is a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

What you will do

• Work with worldwide design and architecture teams to develop leading edge products.
• Involve in all aspects of Design Verification.
• Have opportunities for technical leadership.

Requirements

• Bachelors and 8+ years of related experience or Masters degree and 6+ years of related experience or PhD and 3+ years of related experience
• Self motivated personality with a strong presence to do things right.
• Need to have a strong sense of teamwork and ability to work well with others.
• Experience with constrained random verification methodologies with experience driving completion via coverage closure.

Nice to have

• Skills with SV and UVM, well versed in OOP
• Scripting skills a + (Python, Perl, ...)

Culture & Benefits

• hirify.global offers a competitive and comprehensive benefits package: Medical, dental and vision plans.
• 401(K) participation including company matching, Employee Stock Purchase Program (ESPP).
• Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
• The company follows all applicable laws for Paid Family Leave and other leaves of absence.