Staff Analog Layout Engineer

TL;DR

Staff Analog Layout Engineer: Designing and verifying physical layouts for high-speed or precision analog circuits with an accent on microelectronic layer implementation and iterative refinement. Focus on collaborating with global design teams, ensuring design specifications are met, and contributing to the full development cycle of cutting-edge semiconductor IP.

Location: Onsite in Singapore

Company

hirify.global provides essential semiconductor solutions for data infrastructure, enabling new possibilities across enterprise, cloud, AI, automotive, storage, security, and networking.

What you will do

• Run simulations and verifications using Cadence Virtuoso, collaborating closely with designers for iterative refinement.
• Participate in the full project lifecycle, delivering high-speed or precision analog circuits across multiple process nodes.
• Assume ownership of tasks from cells to functional blocks, higher-level macros, and full interfaces or chips.
• Engage in routine meetings, providing progress updates and presenting technical issues or solutions to global teams.
• Continuously learn and share knowledge within a dynamic team environment.

Requirements

• Fundamental understanding of electrical concepts, preferably acquired through an Electrical Engineering degree (graduate or undergraduate).
• Proficiency in CAD tools for implementing microelectronic layers in design.
• Proven track record of delivering high-speed or precision analog circuits, preferably in multiple process nodes.
• Ownership through the full development cycle: floorplan, layout, verification, delivery, and support.
• Excellent communication skills for collaborating with global teams and various levels of personnel.
• Applicants must be eligible to access export-controlled information as defined under applicable U.S. law.

Culture & Benefits

• Competitive compensation and benefits within an environment of shared collaboration, transparency, and inclusivity.
• Access to tools and resources for impactful work, with opportunities for growth and development.
• Work as a key contributor in the Central Engineering business group, providing IP for various product lines.
• Opportunity to learn several aspects of engineering and deep dive into your specialization.
• Regular meetings and close collaboration ensure partnership and teamwork.

Hiring process

• Candidates are not permitted to use AI tools (such as transcription apps or real-time answer generators) during interviews.
• Interviews are designed to evaluate individual experience, thought process, and real-time communication skills.
• Use of AI tools without prior instruction will result in disqualification.