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3 дня назад

Lead FPGA Firmware Verification Engineer (Aerospace & Defense)

Формат работы
onsite
Тип работы
fulltime
Грейд
lead
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Lead FPGA Firmware Verification Engineer (Aerospace & Defense): Leading and executing FPGA verification for mission-critical aerospace and defense products with an accent on simulation environments, hardware integration, DO-254 compliance, and requirements traceability. Focus on developing automated regressions, analyzing coverage, debugging hardware and simulations, and coordinating certification deliverables across engineering teams.

Location: Alpharetta, Georgia, US

Company

hirify.global develops mission-critical defense technology connecting space, air, land, sea, and cyber domains for national security customers.

What you will do

  • Provide hands-on technical leadership for FPGA verification planning, testbench development, simulation, regression testing, hardware testing, and results analysis.
  • Develop and maintain verification environments using VHDL, Verilog, SystemVerilog, UVM, assertions, and automated scripting infrastructure.
  • Review requirements, create requirements-based verification procedures, and maintain traceability between requirements, tests, results, coverage, and certification evidence.
  • Support DO-254 verification activities, including plans, procedures, results, coverage analyses, and lifecycle documentation.
  • Integrate and troubleshoot FPGA hardware in the laboratory, correlate hardware results with simulations, and resolve verification gaps.
  • Mentor verification engineers and coordinate technical execution, resources, risks, documentation, and deliverables with engineering, program, systems, software, and certification stakeholders.

Requirements

  • Bachelor’s degree with at least 9 years of relevant experience, a graduate degree with at least 7 years of related experience, or 13 years of related experience without a degree.
  • Demonstrated FPGA design and/or verification experience, including simulation development, debugging, and hardware verification.
  • Experience with SystemVerilog, VHDL, UVM, assertions, constrained-random verification, functional coverage, code coverage, and linting.
  • Experience supporting DO-254 Design Assurance Level A programs, certification evidence, and requirements-based verification.
  • Many positions may require the ability to obtain a security clearance; security clearances may only be granted to U.S. citizens. Conditional-offer candidates may undergo government security investigations and must meet classified-information access requirements.
  • Ability to work the 9/80 schedule: 9 of every 14 days, totaling 80 hours, with every other Friday off.

Nice to have

  • Airworthiness certification experience involving MIL-HDBK-516C and AC 17-01.
  • C/C++ experience for FPGA or ASIC verification and reference-model development; MBSE and Cameo experience.
  • Experience with AMD/Xilinx or Intel/Altera FPGA architectures, including UltraScale, UltraScale+, and Zynq UltraScale+ MPSoC devices.
  • Experience with PCI Express, Serial RapidIO, Ethernet, Fibre Channel, 10 Gigabit Ethernet, IPv6, UDP, and high-speed DDR memory interfaces.
  • Proficiency with Vivado, Quartus, QuestaSim, Synplify, legacy ISE 14.7, Linux, and scripting languages such as Python, Perl, Bash, or C shell.
  • Experience with Git or Subversion, Jira, Jama or IBM DOORS, and strong technical writing skills.

Culture & Benefits

  • Inclusive, engaging workplace focused on professional growth, community commitment, and work-life success.
  • Mission-focused collaboration across geographically distributed engineering teams.
  • Employment is subject to applicable background checks and pre-employment substance abuse testing.
  • L3Harris is an Equal Opportunity Employer and an E-Verify Employer.
  • Authorized L3Harris AI tools may support requirements analysis, verification development, debugging, and documentation; outputs must be independently validated and sensitive information protected.

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