3D Packaging Engineer (Quantum Computing)

Location: On-site in Delft, Netherlands; a hybrid setup is also mentioned.

Company

hirify.global develops high-performance quantum processors using VIO technology and 3D quantum integration architectures.

What you will do

• Modify, calibrate, operate, and fine-tune high-precision assembly equipment, including flip-chip bonders and die attach machines.
• Develop and refine placement and bonding processes for non-standard substrates.
• Test adhesives, glues, and solders for performance under extreme thermal cycling and cryogenic vacuum conditions.
• Execute multi-die stacking, interposer-based 3D architectures, and orthogonal vertical chip placement.
• Collaborate closely with the engineering team to physically realize VIO products.

Requirements

• BS, MS, or PhD in Mechanical Engineering, Mechatronics, Physics, Materials Science, or a related field.
• 3–5 years of hands-on experience operating and adjusting high-accuracy semiconductor assembly platforms.
• Demonstrated experience achieving placement tolerances of approximately 1µm in an R&D or pilot production environment.
• Solid foundational understanding of 3D integration, including TSVs, micro-bumps, and interposers.
• Understanding of structural material behavior under thermal stress, high vacuum, or cryogenic conditions.

Culture & Benefits

• High-performing, fast-moving environment with world-class experts.
• Competitive salary with an 8% holiday allowance.
• Generous pension plan with partner and dependent coverage.
• Flexible, outcome-focused work with an open vacation policy and a hybrid setup.
• Individual learning and development budget.
• Team events, offsites, and other opportunities to connect.

Hiring process

• Pre-employment screening may be required.
• Candidates are encouraged to apply even if they do not meet every qualification.