Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Зарплата и рынок
Очень мало
71к-113к CAD/год
100к CAD130к CADмедиана160к CAD
По похожим ролям (49) ~ 130к CAD/год
70
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В Company hidden чётко определена технически насыщенная роль, современные инструменты и достойный пакет льгот, но зарплата для выпускника магистратуры заметно ниже рыночного ориентира, что снижает привлекательность предложения.
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Ниже рынкаСовременные технологииПонятные задачиСильная отрасль
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Analog and Mixed-Signal Modelling Architect (Masters or PhD New Grad) (high-speed optical communications): Designing and validating analog and mixed-signal subsystem models for next-generation coherent optical modems with an accent on C++, SystemC, Python, MATLAB, and system-level verification. Focus on modeling PLLs, clocking systems, filters, DACs, ADCs, and SerDes, correlating silicon and lab data, and supporting ASIC bring-up across analog, digital, DSP, firmware, and electro-optical systems.
Location: Ottawa, Canada
Annual salary: $70,700–$112,900 for Masters new graduates; $89,000–$142,200 for PhD new graduates
Company
hirify.global builds high-speed connectivity infrastructure and networking technology for the AI era.
What you will do
Define and review system-level analog and mixed-signal functions for coherent optical modems.
Develop behavioral models of analog and mixed-signal blocks using C++, SystemC, and SystemC-AMS.
Model PLLs, clocking systems, filters, DACs, ADCs, SerDes, and related continuous-time and mixed-signal subsystems.
Build and maintain C++ and Python/MATLAB verification flows, including C++ MEX wrappers.
Collaborate with analog, digital, DSP, firmware, and lab teams on specifications and validation plans.
Support ASIC lab bring-up and characterization by correlating silicon and lab data with behavioral models and system simulations.
Requirements
Postgraduate degree in Physics or Engineering focused on ASIC hardware, communication systems, and/or control systems.
Internship, co-op, or applied project experience relevant to the role.
Understanding of analog and mixed-signal processing in high-speed communication systems.
Experience writing C++ and/or SystemC behavioral models for hardware-adjacent systems.
Knowledge of analog impairments including noise, distortion, non-linearity, bandwidth limitations, jitter, and phase noise.
Experience with Python, MATLAB, Simulink, Cadence Virtuoso, Cadence AMS Designer, and Xcelium AMS; familiarity with Linux, Git, and collaborative development workflows.
Culture & Benefits
Cross-disciplinary collaboration across analog, digital, DSP, firmware, and laboratory teams.
Development opportunities and meaningful work in high-speed networking technology.
Medical, dental, and vision coverage.
DCPP participation in Canada with company matching, ESPP, EAP, paid holidays, paid sick leave, vacation time, and applicable family leave.
Potential discretionary incentive bonus for non-sales employees.
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