Senior HW Digital Design Verification Engineer (ASIC/SoC)

Location: Sophia-Antipolis (Valbonne), France

Company

hirify.global develops semiconductor products, with this role focused on verification for complex digital designs.

What you will do

• Define and execute verification plans for complex digital blocks and subsystems.
• Design testbench architectures and develop directed, constrained-random, and assertion-based testbenches.
• Build and maintain verification environments using SystemVerilog, UVM, OVM, and e.
• Apply formal verification techniques and perform functional and code coverage analysis.
• Debug design and verification issues in collaboration with design, architecture, and software teams.
• Improve verification methodologies, flows, and tools while mentoring junior engineers.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• 5+ years of experience verifying complex ASICs or SoCs.
• Strong proficiency in SystemVerilog and UVM.
• Experience developing comprehensive test plans and verification environments from scratch.
• Understanding of digital design principles, computer architecture, communication protocols, and EDA verification tools.
• Experience with Python, Perl, or Tcl, plus strong analytical, debugging, communication, and collaboration skills.

Nice to have

• Experience with formal verification techniques.

Culture & Benefits

• Collaborative work with design, architecture, and software teams.
• Opportunities to contribute technical expertise and improve verification practices.