Назад
4 дня назад

Post-Silicon Lab Manager (AI Semiconductor)

100 000 - 500 000$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior/lead
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Post-Silicon Lab Manager (AI Semiconductor): Owns and scales lab infrastructure for CPU post-silicon bring-up, system validation, power/performance assessment, and customer enablement with an accent on RISC-V CPUs, chiplet systems, and board-level hardware debug. Focus on deploying automated validation benches, managing lab capacity and CapEx, and solving first-silicon and platform validation challenges under tape-out and silicon-arrival deadlines.

Location: Hybrid, based in Santa Clara, California, United States

Compensation: $100,000–$500,000, including base and variable compensation targets.

Company

Tenstorrent develops high-performance AI platforms based on software, compilers, networking, semiconductors, RISC-V CPUs, and chiplet technologies.

What you will do

  • Own day-to-day lab operations for CPU post-silicon validation, power and performance assessment, and hardware debug.
  • Lead first-silicon power-on, system bring-up, platform validation, and board-level fixes for evaluation boards.
  • Deploy and maintain server racks, data acquisition systems, power telemetry rigs, and automated test benches for multicore CPUs and chiplet-based systems.
  • Manage lab infrastructure, CapEx budgets, equipment inventory, calibration cycles, silicon allocation, and safety compliance.
  • Direct post-silicon validation engineers and coordinate with Emulation, Silicon Design, Software, and Architecture teams.

Requirements

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related technical field.
  • 8–12+ years of experience in semiconductor hardware, including 3+ years leading a post-silicon validation, characterization, or CPU hardware lab team.
  • Deep knowledge of PCIe, DDR/GDDR/HBM, SerDes, and fabric links.
  • Hands-on experience with board-level debug tools and troubleshooting physical hardware under tight deadlines.
  • Clear cross-functional communication and experience aligning remote, multi-site teams from the Santa Clara hub.
  • Eligibility to access U.S. export-controlled technology is required; employment may depend on citizenship, permanent residency, or prior export-license approval.

Nice to have

  • Experience with advanced multicore CPU and chiplet architectures.
  • Experience building and scaling post-silicon laboratories in a fast-moving or startup environment.

Culture & Benefits

  • Hybrid work based in Santa Clara.
  • Competitive compensation package with base and variable compensation targets.
  • Opportunity to work on next-generation AI, RISC-V CPU, and chiplet technologies.
  • Collaboration across hardware, software, architecture, emulation, and silicon design functions.
  • Equal opportunity employment.

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