Mixed Signal Verification Engineer

TL;DR

Mixed Signal Verification Engineer: Ensuring high-quality design of analog and mixed-signal IPs for intelligent IoT edge microcontrollers with an accent on functional verification and robustness checks. Focus on developing SV Real Number and Verilog-AMS models, performing top-level analysis, and validating DFT strategies in collaboration with design and systems teams.

Location: Catania, Italy

Salary: €38,000–€52,300 gross annually

Company

hirify.global is a global leader in secure connectivity solutions for embedded applications, driving innovation in the industrial and IoT edge sectors.

What you will do

• Develop SV Real Number and Verilog-AMS models for analog blocks.
• Identify design bugs and issues in the architecture of Analog/Mixed Signal IPs.
• Perform functional verification and robustness checks using advanced methodologies.
• Conduct top-level analysis and verification of test-modes and DFT strategies.
• Collaborate closely with designers and systems engineers to ensure high-quality product delivery.

Requirements

• Bachelor’s or Master’s degree in Electronics, Electrical Engineering, or Computer Science.
• English proficiency (read, spoken, written) is mandatory.
• Minimum 2+ years of experience in Analog Mixed Signal design or verification.
• Strong knowledge of Verilog, System Verilog, Verilog-AMS, and/or Verilog-A.
• Solid understanding of analog and mixed-signal fundamentals.
• Strong communication and teamwork skills.

Nice to have

• PhD in a relevant engineering field.

Culture & Benefits

• Commitment to sustainability and measurable year-on-year progress.
• Inclusive work environment with active programs for diversity, inclusion, and equality.
• Competitive compensation package under the National Collective Labour Agreement (Metalmeccanica Industria).
• Opportunities for annual incentives and equity participation.