Senior Test Engineer (Hardware)

TL;DR

Senior Test Engineer (Hardware/Python): Developing and optimizing hardware diagnostic solutions and automated test platforms for complex silicon design systems with an accent on modular design and reliability. Focus on building automated test cells, extending functional diagnostics APIs, and improving production test processes for ASICs and FPGAs.

Location: Primarily Guadalajara, Mexico (onsite at hirify.global office or local partner sites)

Company

A leading provider of electronic design automation (EDA) and intellectual property (IP) for silicon design.

What you will do

• Collaborate with contract manufacturers (CMs) and production engineers to set up automated system testing and board test cells.
• Expand the company's automated test platform, including the development of a GUI for execution and result review.
• Design, maintain, and extend modular functional diagnostics and APIs for hardware testing.
• Automate Linux workstation setup and maintenance.
• Drive technical solutions from rough requirements to implementation through cross-functional collaboration.

Requirements

• BA/BS degree in Computer Science, Electrical Engineering, or equivalent.
• Proficiency in Python scripting, Unix/Linux, and shell scripting.
• Experience with board schematics, board functional tests, and ASIC testing.
• Knowledge of SERDES, ASICs, FPGAs, DDR3/4, I2C, SPI, ENET switches, Optics, and PCIE.
• Must be based in or able to work from Guadalajara, Mexico.

Nice to have

• Experience with liquid-cooled computer systems.
• Knowledge of high-density Optical and Network test processes (Infiniband, RoCE V2).
• Experience testing high-density press-fit backplanes.
• Advanced Linux administration and software development tool proficiency.

Culture & Benefits

• Opportunity to work in a high-energy, collaborative team environment.
• Exposure to cutting-edge systems from industry-leading silicon design companies.
• Focus on developing leadership and innovation within the tech sector.
• Role reports directly to the Director of Test Engineering.