Lead Verification Engineer (AI)

TL;DR

Lead Verification Engineer (ASIC/AI): Architecting and validating the next generation of pre-silicon verification methodologies by integrating AI and LLMs with an accent on streamlining UVM and formal verification. Focus on developing agentic AI solutions and employing AI-enhanced EDA tools to accelerate the design and verification lifecycles.

Location: Hsinchu, Taiwan

Company

hirify.global is a leading provider of electronic design automation (EDA) software and hardware tools for semiconductor design.

What you will do

• Apply machine learning techniques to streamline traditional pre-silicon functional verification methodologies like Formal and UVM.
• Develop agentic AI solutions using LLMs and ML technologies to accelerate the Design Verification process.
• Utilize AI-enhanced EDA tools to improve and expedite both design and verification lifecycles.
• Collaborate with machine learning and software engineering teams to validate output correctness, efficiency, and quality.
• Engage directly with customers to understand requirements and deliver innovative verification strategies.
• Maintain knowledge of AI-powered hardware verification advancements and foster internal knowledge growth.

Requirements

• Bachelor's degree in Electrical or Computer Engineering with 4+ years of experience, or Master's degree with 2+ years of experience.
• Proven expertise in pre-silicon ASIC verification methodologies such as Formal, SV/UVM, and/or OVM.
• Advanced skills in debugging pre-silicon verification failures using waveform viewers and simulation analysis tools.
• Hands-on experience with industry-standard EDA tools including Jasper, Xcelium, and IMC.
• Strong programming skills in Verilog, System Verilog, and Python.
• Excellent communication skills and ability to thrive in a team-oriented environment.

Nice to have

• Exposure to LLMs and ML technologies such as RAG, RFT, RL, and Agentic frameworks.