Design Verification Student Worker (SoC)
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
TL;DR
Design Verification Student Worker (SoC): Designing and implementing features for next-generation SoCs with an accent on new design methodologies and AI engines. Focus on IP to SoC integration, developing automation scripts, and debugging digital simulations.
Location: Hybrid (Guadalajara, Mexico). Must have unrestricted, permanent right to work in Mexico
Company
is a global leader in semiconductor manufacturing, focusing on the development of next-generation SoC and x86-based products for data centers and AI-accelerated systems.
What you will do
- Integrate IP into SoC and implement new design features.
- Develop automation scripts to optimize design methodologies.
- Perform and debug digital simulations to ensure bug closure.
- Collaborate with design engineers and micro-architects to implement efficient hardware flows.
- Explore the use of AI engines and modern hardware description languages in design.
Requirements
- Pursuing a Master's or PhD in Computer Science, Electrical/Electronic/Systems Engineering, or Mechatronics (min. 1 year until graduation).
- 4 months of experience in digital design, ASIC design flow, and computer architecture.
- Proficiency in C/C++, Python, Perl, Ruby, and Unix/Linux.
- Experience with HDLs such as VHDL, Verilog, or SystemVerilog.
- Basic skills in pre-Si validation using logic simulators (Xilinx, Quartus, Modelsim, VCS).
- Advanced English level and unrestricted, permanent right to work in Mexico.
Nice to have
- Experience with testbench development and writing test scenarios.
- Knowledge of functional coverage concepts and implementation.
Culture & Benefits
- Hybrid work model allowing split time between on-site and off-site work.
- Exposure to industry best practices for documentation, quality, and design reviews.
- Collaborative environment within cross-functional engineering teams.
- Practical experience in professional hardware design and development processes.
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