Назад
Company hidden
2 дня назад

Distinguished Engineer (Memory Subsystem)

209 770 - 314 300$
Формат работы
onsite
Тип работы
fulltime
Грейд
lead
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/

TL;DR

Distinguished Engineer (Memory Subsystem): Taking end-to-end technical ownership of memory subsystems across all programs, customers, and SoCs with an accent on architecture through post‑silicon validation and customer engagement. Focus on delivery of platform‑ready, reusable memory subsystems spanning DDR4/DDR5, LPDDR5/5X, and HBM4/HBM4e, aligned to JEDEC standards and long‑term product roadmaps.

Location: Onsite in Santa Clara, CA

Salary: $209,770 - $314,300 per annum

Company

hirify.global’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.

What you will do

  • Own the Memory Subsystem TFM and technical roadmap across current, next‑generation (N+1), and future (N+2) platforms.
  • Act as the final technical authority for architecture, micro‑architecture, RTL, DV, PHY integration, and system validation decisions.
  • Define and maintain reference architectures, configuration models, and integration guidelines for memory subsystems.
  • Drive sign‑off criteria, quality gates, and KPIs across architecture, DV, and validation.
  • Serve as the first technical point of contact for customers on memory subsystem architecture, features, and roadmap.
  • Align memory subsystem evolution with SoC, compute, AI, and interconnect roadmaps across the company.

Requirements

  • 10+ years of experience in memory subsystem, SoC, or IP development.
  • Expertise in DDR4/DDR5, LPDDR5/5X, and/or HBM architectures and system integration.
  • Background in architecture, RTL, verification, and silicon bring‑up.
  • Proven track record owning complex subsystems end‑to‑end across multiple products.
  • Experience working directly with customers and external partners.
  • Strong technical leadership and decision‑making skills in multi‑site environments.

Nice to have

  • Experience defining reusable subsystem platforms or Centers of Excellence.
  • Familiarity with CHI/AXI‑based SoC fabrics and cross‑subsystem interactions.
  • Prior role as Chief Engineer, Fellow, or equivalent technical authority.

Culture & Benefits

  • Employee stock purchase plan with a 2-year look back.
  • Family support programs to help balance work and home life.
  • Robust mental health resources to prioritize emotional well-being.
  • Recognition and service awards to celebrate contributions and milestones.

Hiring process

  • Candidates are not permitted to use AI tools during interviews.
  • Interviews are designed to evaluate your individual experience, thought process, and communication skills in real time.
  • Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →