Hardware Tools Engineer (AI)

TL;DR

Hardware Tools Engineer (AI): Developing and evolving the tooling ecosystem for hardware engineers focused on hardware compilers and IR transformations for simulation, debugging, and automation infrastructure. Focus on software engineering, compiler concepts, and practical hardware workflows to accelerate the design of next-generation AI systems.

Location: Must be located in San Francisco

Salary: $225K – $445K + Offers Equity

Company

hirify.global is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity.

What you will do

• Build and improve software tooling for hardware teams, focusing on compilation, IR transforms, RTL generation, simulation, debug, and automation.
• Extend and integrate hardware compiler stacks, connecting them to real design workflows.
• Improve developer experience and reliability through reproducible builds, better error messages, and dependable CI and regression infrastructure.
• Collaborate with designers and verification engineers to turn pain points into durable tools.
• Dive into RTL to debug issues, validate tool output, and improve debuggability.
• Enable PPA optimization loops by building analysis and automation around area, timing, and power tradeoffs.

Requirements

• Demonstrated ability to build and maintain software (projects, internships, research, open source, or equivalent experience).
• Strong CS fundamentals: data structures, algorithms, debugging, and software design.
• Proficiency in at least one of Rust, C++, or Python (and willingness to learn the rest).
• Familiarity with digital design concepts and the ability to read RTL (Verilog/SystemVerilog) or equivalent hardware descriptions.
• Familiarity with compiler or IR-based ideas (representations, passes, transformations, lowering).
• Comfort operating in ambiguity and iterating quickly with users of your tools.

Nice to have

• Exposure to compiler and hardware toolchains such as XLS/DSLX, LLVM, Chisel/FIRRTL, CIRCT/MLIR, other novel hardware languages (e.g. HardCaml, SpinalHDL, Spade, PyMTL, Clash, BlueSpec, PyRope)
• Experience with Verilog tooling ecosystems (Yosys/RTLIL, Verilator, Slang) or writing tooling around them.
• Experience with build and test infrastructure (Bazel, CI systems, fuzzing, performance testing).
• Prior work touching synthesis, place and route, static timing analysis, or other PPA-related workflows.

Culture & Benefits

• Push the boundaries of AI system capabilities and safely deploy them through products.
• Be part of an equal opportunity employer that values diverse perspectives and experiences.
• Contribute to ensuring that general-purpose artificial intelligence benefits all of humanity.