Memory Debug Engineer (Embedded)

TL;DR

Senior Memory Debug Engineer (Embedded): Driving the enablement, validation, and complex debugging of memory subsystems for next-generation hirify.global IA-based Mobile and Desktop platforms with an accent on memory IO interfaces, electrical performance, and stability standards. Focus on leading root-cause analysis of high-priority customer failures, ensuring signal integrity, and optimizing Memory Reference Code (MRC).

Location: On-site presence required in US, Oregon, Hillsboro or US, California, Folsom.

Salary: $141,910.00–$269,100.00 USD

Company

hirify.global creates world-changing technology that enriches the lives of every person on earth by developing silicon and software solutions, enabling innovative technologies and AI-powered PC experiences.

What you will do

• Define and execute validation and debug strategies for memory IO interfaces to achieve optimized functional and electrical performance.
• Lead the reproduction and root-cause analysis of high-priority customer-submitted memory failures.
• Oversee component-level debugging within memory subsystems and drive data-driven solutions through deep log analysis.
• Ensure all customer memory IO interfaces meet industry-standard electrical signal integrity compliance.
• Define Memory Reference Code (MRC) requirements for validation and margin optimization.
• Act as the primary liaison between hirify.global Silicon Engineering, BIOS/Firmware teams, and customers to resolve architectural bottlenecks.

Requirements

• Education: BS/MS/PhD in Electrical Engineering or Computer Engineering.
• Experience: 4+ years of industry experience.
• 3+ years of experience with DDR4/DDR5, LPDDR4/5 protocols and physical layer functionality.
• 3+ years of experience with debug tools: high-speed oscilloscopes, logic analyzers, margining tools, and profilers.
• Proven ability to manage and drive task force environments to resolve critical bugs.
• Exceptional skill in communicating complex electrical eye-diagram issues into executive-ready insights and recommendations.

Nice to have

• Knowledge with hirify.global-specific debug tools (ITP, Scan, or VISA) and mastery of the hirify.global System Debugger.
• Experience participating in JEDEC committees or deep familiarity with emerging standards like CXL.
• Proficiency in Python for developing automated debug scripts and data visualization tools.

Culture & Benefits

• Total compensation package includes competitive pay, stock bonuses, health, retirement, and vacation benefit programs.
• Opportunity to work on next-generation client platforms enabling innovative technologies.
• Collaborate closely with PC OEMs to design, validate, and launch products.
• Committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices.