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2 дня назад

Principal Logic Design Engineer

Формат работы
hybrid
Тип работы
fulltime
Грейд
principal
Английский
b2
Страна
Canada
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

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TL;DR

Principal Logic Design Engineer: Designing and optimizing logic for multiprotocol SerDes IP blocks, ensuring high-quality integration and verification for next-generation products. Focus on defining architecture, microarchitecture features, and applying optimization strategies to meet power, performance, area, and timing goals.

Location: Hybrid work model in Toronto, Canada

Company

hirify.global is a technology company shaping the future of AI, analytics, and cloud-to-edge technology.

What you will do

  • Design logic and code RTL for IP required to generate cell libraries and functional units.
  • Participate in defining architecture and microarchitecture features of designed blocks.
  • Optimize logic to meet power, performance, area, and timing goals for physical implementation.
  • Review and verify design features, resolving issues for failing RTL tests.
  • Support SoC customers for high-quality IP block integration and verification.
  • Drive quality assurance compliance and create design documentation.

Requirements

  • Experience: Bachelor’s in electrical/computer engineering with 10+ years or Master's degree with 6+ years of experience.
  • Deep experience in Mixed-signal and High-Speed SerDes design and architecture.
  • Experience with PCS/FEC, gearbox, equalization, and clocking structures.
  • Experience with pipelining, retiming, clock domain crossings (CDC), and latency optimization.
  • Experience with post-silicon validation and support of High-Speed SerDes IP.
  • Ability to interpret technical specifications and implement RTL design in SystemVerilog.
  • Excellent communication and teamwork skills.

Nice to have

  • Familiarity with AXI, AHB, and APB protocols.
  • Experience with DSP-based CDR design, FEC coding, and hardware/software co-simulation.
  • Experience with PCIe, Ethernet, CEI, or USB standards.
  • Scripting proficiency in TCL, Perl, Python, or Ruby.
  • Knowledge of UVM/testbench architecture and constrained random testing.

Culture & Benefits

  • Hybrid work model with split time between working on-site at the assigned hirify.global site and off-site.
  • hirify.global is committed to a culture of accessibility and provides accommodations to applicants and employees with disabilities.
  • Committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices.

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