Senior Verification Engineer (AI, SoC)

TL;DR

Senior Verification Engineer (AI SoC): Leading the functional verification of complex digital ASIC designs for AI workloads with an accent on SystemVerilog, UVM methodology, and comprehensive test plan definition. Focus on debugging issues in presilicon environments, ensuring security coverage, and driving execution to achieve code and functional coverage closure.

Location: This role is eligible for a hybrid work model, requiring employees to split time between working on-site at assigned hirify.global sites in Folsom, Santa Clara (California), Hillsboro (Oregon), or Austin (Texas), USA and off-site.

Salary: $190,610–$269,100 USD

Company

hirify.global's AI SoC organization develops cutting-edge products powering next-generation AI applications, driving innovation across various industries and solving global challenges.

What you will do

• Lead digital ASIC verification at block and system level for advanced AI SoCs.
• Define and review comprehensive test plans, ensuring alignment with design specifications and coverage goals.
• Architect and develop SystemVerilog testbench infrastructure (UVM and non-UVM).
• Drive execution of test plans, regression runs, and achieve code and functional coverage closure.
• Collaborate with design teams to debug issues and contribute to pre-silicon and post-silicon validation.
• Mentor junior engineers and establish best practices for verification methodology.

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science.
• 7+ years of experience in ASIC/SoC verification.
• Ability to lead projects, work cross-functionally, and deliver under tight schedules.
• Strong communication skills and a collaborative mindset.

Nice to have

• Expertise in SystemVerilog and UVM methodology.
• Strong understanding of digital design concepts, clock domain crossings, and power management.
• Experience with verification of complex SoCs, including CPU subsystems and standard bus protocols (AXI, AHB).
• Familiarity with industry standard EDA tools, including simulators (VCS, Questa, Xcelium), coverage analysis tools, and modern waveform debug environments.
• Scripting skills (Python, Perl, TCL) for automation.

Culture & Benefits

• Hybrid work model, allowing split time between on-site and off-site.
• Total compensation package including competitive pay, stock bonuses, and benefit programs.
• Health, retirement, and vacation benefits.
• Commitment to Responsible Business Alliance (RBA) compliance and ethical hiring practices.