Datacenter & Agentic AI Workload Performance Optimization Engineer (RISC-V)

Location: Remote, based out of North America; listed locations include Santa Clara, California, United States and Toronto, Ontario, Canada.

Company

Tenstorrent develops AI computing platforms combining software, compilers, networking, high-performance RISC-V CPUs, and semiconductor technology.

What you will do

• Optimize modern datacenter and agentic AI workloads across Java, Python, PHP, Node.js, Lua, Go, and Rust.
• Profile real-world applications, identify bottlenecks, and improve throughput, latency, and efficiency.
• Bring up and tune runtimes while investigating memory behavior, concurrency, garbage collection, and CPU performance.
• Develop software, compiler, runtime, and hardware-aware optimizations for RISC-V platforms.
• Explore RISC-V Vector, Matrix, and custom instruction capabilities for workload acceleration.
• Collaborate with compiler, runtime, systems software, hardware, and performance modeling teams.

Requirements

• Master’s or PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related field.
• Strong experience in performance optimization, computer architecture, compilers, or systems software.
• Hands-on experience with runtime or compiler optimization, such as OpenJDK/JIT, LLVM, GCC, V8, or Python.
• Strong understanding of CPU performance, memory hierarchies, concurrency, garbage collection, vector/SIMD optimization, and RISC-V architecture.
• Experience with Linux perf, runtime profilers, QEMU, tracing tools, or performance modeling environments.
• Strong programming skills in Java, Python, C/C++, and RISC-V assembly.

Nice to have

• Experience using AI-assisted development and automated workflows for profiling, coding, benchmarking, and optimization.
• Experience optimizing software on RISC-V or another modern CPU architecture.

Culture & Benefits

• Collaborative environment focused on curiosity and solving technically difficult problems.
• Opportunity to influence both the RISC-V software ecosystem and future CPU architecture.
• Competitive compensation package and benefits.
• Equal opportunity employment.
• Employment is subject to eligibility to access U.S. export-controlled technology.