13 дней назад
Internship: Digital Design F/M (AI)
Вакансия из Hirify Global, списка международных tech-компанийДля мэтча и отклика нужен Plus
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Internship: Digital Design F/M (AI) (RTL/SoC): Supporting the development and verification of digital sub-circuits for complex System-on-Chip designs with an accent on Verilog/SystemVerilog RTL coding, synthesis, timing analysis, and formal verification. Focus on debugging simulations, contributing to DFT and power-analysis activities, and collaborating across analog, mixed-signal, digital, and software teams.
Location: Catania, Italy
Company
develops industrial and IoT edge-processing solutions, including microcontrollers and high-performance processors for real-time insights and automation.
What you will do
- Support the development of digital sub-circuits for complex System-on-Chip designs based on defined specifications.
- Gain hands-on experience with RTL coding in Verilog/SystemVerilog, synthesis, static timing analysis, formal verification, power analysis, and design for testability.
- Assist with simulation-based design verification, structured debugging, lab preparation, validation, and issue analysis.
- Collaborate with analog, mixed-signal, digital, and software engineering teams on interfaces, system performance, and integration.
- Prepare technical documentation, including design notes, verification summaries, and review materials.
- Apply established design methodologies while learning from experienced engineers and contributing to project quality and schedules.
Requirements
- Currently pursuing a Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.
- Basic knowledge of Verilog/SystemVerilog for RTL design or verification through coursework, academic projects, or internships.
- Understanding of digital design principles, with interest in clock domain crossing, low-power design, and SoC integration.
- Problem-solving ability, attention to detail, and effective collaboration and communication skills.
- Curiosity, willingness to learn, and motivation to develop technical skills in digital IC design.
Nice to have
- Familiarity with RTL coding, synthesis, static timing analysis, formal verification, or EDA tools.
- Exposure to Python, Perl, or Tcl scripting for automation.
Culture & Benefits
- Hands-on project exposure within a growing Catania engineering team.
- Mentoring from experienced digital design engineers.
- Potential collaboration on a university thesis.
- Exposure to emerging technologies and best practices in digital IC design methodology.
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