Design Eng - Modeling

Location: Manila, Philippines. The role requires satisfactory proof of the right to work in the Philippines.

Company

hirify.global develops low-power programmable logic, FPGA, CPLD, and programmable power management solutions for customers worldwide.

What you will do

• Develop and maintain functional and behavioral IP models using Verilog, SystemVerilog, and, where applicable, SystemC and C++.
• Translate IP specifications, schematics, RTL, and design intent into model requirements, implementation plans, and verification objectives.
• Perform functional testing, lint and CDC checks, regression testing, audits, and equivalency checks against approved hardware references.
• Generate, validate, audit, and release timing, power, signal-integrity, configuration, and metadata deliverables.
• Investigate model behavior and hardware-to-software integration issues across the IP development lifecycle.
• Build reusable scripts and workflows, lead technical reviews, mentor engineers, and improve modeling and verification practices.

Requirements

• Bachelor’s or Master’s degree in Electrical, Electronics, Computer Engineering, or a related field.
• Senior-level experience in digital, custom, analog, FPGA, ASIC, or IP modeling and verification.
• Strong understanding of digital design fundamentals, RTL, simulation, and design and verification flows.
• Proficiency in Verilog and/or SystemVerilog and experience with digital simulation tools.
• Knowledge of semiconductor and integrated-circuit principles, including device behavior, layout, timing, power, and signal integrity.
• Experience with engineering automation using Python, Perl, TCL, or Shell, plus verification planning and technical issue resolution.

Nice to have

• Experience modeling custom digital or analog IP behavior.
• Knowledge of timing, power, IBIS, signal integrity, configuration, XML, or metadata-based IP deliverables.
• Experience with model equivalency, regression automation, lint, CDC, or design-quality audits.
• Familiarity with FPGA platforms and hardware-software enablement flows.
• Experience improving engineering processes or mentoring engineers.

Culture & Benefits

• Work in a fast-paced, results-oriented, team-first environment.
• Collaborate with international, multi-site, and cross-functional engineering teams.
• Use approved GenAI tools for learning, code review, debugging, documentation, automation, and technical summarization while protecting confidential information.
• Access a comprehensive compensation and benefits program.
• Contribute to a diverse and inclusive workplace focused on customer success and product innovation.