2 дня назад
Staff Package Design Engineer - Substrate （ ）
Вакансия из Hirify Global, списка международных tech-компанийДля мэтча и отклика нужен Plus
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Staff Package Design Engineer - Substrate （ ） (Power SiP, wafer-level, and flip-chip packaging): Designing and qualifying semiconductor package and interconnect technologies for power SiP/modules, wafer-level chip-scale packages, flip-chip, multi-chip modules, and power devices with an accent on embedded substrates, materials, assembly processes, and reliability. Focus on running DOE, establishing process specifications and production controls, resolving process integration issues, and transitioning qualified packages into production.
Location: Shanghai, China; onsite only
Salary: Competitive benefits package; salary details are provided during the hiring process.
Company
is a global semiconductor company developing products for automotive, industrial, infrastructure, and IoT applications.
What you will do
- Design and develop package and interconnect methods for power SiP/modules, wafer-level chip-scale packages, flip-chip, multi-chip module LGA, and power device packaging.
- Develop embedded substrate packages incorporating FET dies, IC drivers, and capacitors.
- Benchmark, select, and qualify materials, processes, OSATs, and contract manufacturers for consumer, industrial power, and automotive power applications.
- Run design of experiments with manufacturing partners to optimize processes and establish process specifications.
- Resolve process integration issues, establish production controls, and support production ramp-up and quality monitoring.
- Collaborate with product, reliability, quality, operations, and marketing teams to qualify new packages, resolve customer complaints, and execute the packaging roadmap.
Requirements
- Doctorate, master’s, or bachelor’s degree in physics, chemistry, mechanical, electrical, or materials engineering.
- 6–12 years of relevant package development experience focused on power SiP/modules, wafer-level packaging, and flip-chip packaging.
- Strong understanding of power SiP/modules with substrates or embedded dies and capacitors.
- Knowledge of assembly processes, package qualification methods, SPC, and statistical analysis software.
- Strong interpersonal, communication, analytical, and presentation skills.
Nice to have
- Knowledge of Cu FSM/BGBM technologies.
Culture & Benefits
- Regular permanent employment with a competitive benefits package.
- Work within a global organization of more than 21,000 employees across over 30 countries.
- Culture centered on transparency, agility, innovation, global collaboration, and entrepreneurship.
- Commitment to diversity and inclusion.
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