Senior Digital Verification Engineer (UVM)

Location: Kallithea, Athens, Greece; onsite only

Company

hirify.global is an embedded semiconductor solution provider developing technology for automotive, industrial, infrastructure, and IoT applications.

What you will do

• Define verification strategies and test plans for complex IC blocks and systems.
• Build UVM-based verification environments from scratch and lead end-to-end execution.
• Drive functional and code coverage to closure through constrained-random testing, SVA, and formal verification.
• Review specifications to improve clarity, quality, and fitness for verification.
• Collaborate with architecture, design, and software teams on hardware/software partitioning and system-level verification.
• Mentor junior engineers, lead technical reviews, optimize automation flows, and evaluate third-party VIP and verification tools.

Requirements

• Extensive experience in ASIC or IC digital verification.
• Strong mastery of SystemVerilog and UVM, including independently creating a complete UVM testbench.
• Proficiency with Verilog, VHDL, industry-standard simulators, and verification management tools such as Cadence Xcelium and eManager/vManager.
• Experience with functional verification, assertion-based verification, formal verification, and regression frameworks.
• Intermediate to advanced digital design skills and the ability to work closely with design and architecture teams.
• Strong written and verbal English communication skills, with the assertiveness to guide technical decisions.

Culture & Benefits

• Work within a global team of more than 21,000 engineers and problem solvers across over 30 countries.
• Culture grounded in transparency, agility, global collaboration, innovation, and entrepreneurship.
• Competitive benefits package provided alongside the salary.
• Equal opportunity workplace focused on diversity and inclusion.