Digital IC Design Engineer

Location: On-site in Paris, France, or Tel Aviv, Israel

Company

hirify.global is an AI and computer hardware company developing technologies at the intersection of artificial intelligence and semiconductors.

What you will do

• Design and verify digital RTL subsystems for high-speed analog and mixed-signal circuits, including calibration engines, control FSMs, data converters, multiplexing logic, and serial or parallel data paths.
• Integrate and customize external IP blocks such as GPIOs, LVDS I/Os, and SPI/I²C interfaces while meeting analog signal and timing requirements.
• Own the digital implementation flow from RTL and synthesis through floorplanning, place and route, timing closure, physical signoff, and tape-out.
• Collaborate with analog, layout, and system teams to optimize digital-analog boundaries and resolve cross-domain issues.
• Contribute to high-speed serial I/O subsystem development, including SerDes blocks.

Requirements

• Strong experience in digital RTL design using Verilog and SystemVerilog for mixed-signal systems.
• Deep understanding of digital-analog integration, timing closure, noise coupling, clock domain crossing, and analog-aware floorplanning.
• Experience driving digital blocks through design, verification, synthesis, physical implementation, and tape-out, especially for analog or RF ICs.
• Proficiency with front-end and back-end industry-standard EDA toolchains and mixed-signal layout constraints.
• Proficient English is required.

Nice to have

• Experience designing and implementing high-speed serializers and deserializers (SerDes).
• French language skills.

Culture & Benefits

• Competitive cash compensation based on location, experience, and comparable team compensation.
• Meaningful stock options are included in the majority of full-time offers.
• Relocation bonus and moving-expense coverage for relocation within 20 minutes of the company location.
• Healthcare coverage, pension contributions, professional development support, 25 days of paid time off, and public holidays.
• Reimbursement of 50% of the public transport subscription fee.
• High-paced, multicultural, engineering-led environment with ownership of a key technical domain.