Technical Staff Digital Design Engineer (Ethernet PHY)

Location: Ireland - Cork; travel required for 0%–25% of the time.

Company

hirify.global develops networking ICs and software for automotive and industrial applications, including Ethernet, Single-Pair Ethernet, PCIe, USB, and PoE products.

What you will do

• Architect and develop digital blocks for digital ASIC products and serial communication PHY layers.
• Write RTL code and perform functional verification and bit-matching against system models.
• Design pre-silicon FPGA emulation solutions using an industry-leading ASIC design flow.
• Collaborate with system architects, analog/mixed-signal designers, and verification teams.
• Support silicon bring-up with validation, firmware, and PTE teams.
• Lead design reviews, documentation, and technical mentorship for junior engineers.

Requirements

• Bachelor’s degree in science, engineering, or a related field.
• 12+ years of experience in digital ASIC design.
• Experience with RTL coding in Verilog, SystemVerilog, or VHDL.
• Strong knowledge of high-speed, asynchronous, and low-power circuit design.
• Strong knowledge of digital IC development flow.
• Experience working with global teams.
• Familiarity with functional verification using Verilog/SystemVerilog.

Nice to have

• Experience with automotive and industrial Ethernet standards, including 802.3bp, 802.3ch, or 802.3cg.
• Experience in mixed-signal design.
• Knowledge of DSP algorithms and communication systems.

Culture & Benefits

• Work within a global organization with teams across multiple locations.
• Culture based on trust, empowerment, respect, diversity, communication, and community.
• Access to employee development and career-growth programs.
• Opportunity to work on networking products targeting automotive and industrial markets.