Engineer II-Design (ASIC/RTL)

Location: Allentown, Pennsylvania, United States. The role is performed fully indoors and requires eligibility under U.S. export controls: US citizenship, permanent US residency, or protected-individual status.

Company

hirify.global is a global semiconductor technology company developing devices and solutions for imaging, networking, system connectivity, compute, and data storage.

What you will do

• Design RTL modules and create detailed design specifications.
• Analyze performance and implement RTL for ASIC and SoC designs.
• Perform synthesis, simulation, formal verification, cross-domain clocking analysis, and pre-layout/post-layout timing verification.
• Develop high-speed design techniques to improve data and command processing bandwidth, reduce latency, and increase reliability.
• Port designs to test chips and emulation platforms, including FPGA and board implementation support.
• Design complex state machines and datapath logic while implementing industry standards.

Requirements

• 2–5 years of experience in RTL design for ASIC implementation.
• Bachelor’s degree in Electrical Engineering, Computer Engineering, or Computer Science.
• Coursework and practical experience in high-speed RTL design, RTL design, design verification, synthesis, formality, static timing analysis, and Verilog simulation.
• Experience with design entry, synthesis, formal verification, RTL- and gate-level simulation, cross-domain clocking analysis, and static timing analysis tools.
• Proficiency in SystemVerilog.
• Proficiency in TCL, Perl, or Python scripting and Linux.
• Ability to write detailed design specifications and clean, readable presentations.
• Good analytical, oral, and written communication skills; ability to work to schedule requirements.
• Self-motivated, proactive team player able to understand and implement industry standards.

Nice to have

• Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science.
• FPGA and ASIC system-on-chip design experience.
• Lab experience in system-level validation.

Culture & Benefits

• Full-time position within a 17,000-member global organization.
• Culture emphasizing trust, empowerment, respect, diversity, communication, employee development, and community.
• Leadership development programs and opportunities for career growth.
• Travel requirement of 0%–25%.
• Physical work profile: 100% indoors, 80% sitting, 10% standing, and 10% walking.
• Equal opportunity and affirmative action employer.