SoC Validation/FPGA Engineer (Tech Staff Engineer)

Location: Ireland - Dublin

Company

hirify.global develops semiconductor technologies, including FPGA and SoC products, for applications that power devices and systems worldwide.

What you will do

• Lead SoC validation, silicon bring-up, and system-level debugging from prototype through production.
• Develop validation plans, diagnostic software, and bare-metal firmware for ARM Cortex-M and RISC-V platforms.
• Validate PCIe, Ethernet, USB, SPI, I²C, UART, timer, and watchdog interfaces and subsystems.
• Debug hardware, firmware, and system interactions using oscilloscopes, logic analyzers, protocol analyzers, and FPGA debug tools.
• Drive root-cause analysis across simulation, emulation, FPGA prototypes, and silicon in collaboration with architecture, RTL, verification, firmware, and physical design teams.
• Mentor junior engineers and use automation and AI-assisted development tools to improve validation efficiency.

Requirements

• Master’s degree in Electrical or Computer Engineering and 12+ years of experience.
• Strong experience with FPGA/SoC architectures, silicon validation, and system-level debugging.
• Embedded software development in C/C++ and bare-metal firmware for ARM Cortex-M and RISC-V processors.
• Knowledge of JTAG, SVF, IEEE 1532, STAPL, embedded peripherals, and interfaces.
• Familiarity with Verilog/VHDL and FPGA development flows.
• Excellent communication skills and a focus on quality engineering.

Nice to have

• High-speed SERDES bring-up and debugging experience.
• Knowledge of PCIe Gen3/4/5, Ethernet, USB 3.x, JESD204C, Interlaken, or related protocols.
• Experience with Git, Bitbucket, Jira, Confluence, Perl, or Tcl.
• Familiarity with AI-assisted engineering.

Culture & Benefits

• Work on FPGA and SoC innovation with broad exposure to hardware, firmware, system validation, and high-speed interfaces.
• Opportunities for technical leadership, mentoring, and professional growth.
• Culture centered on trust, empowerment, respect, diversity, communication, and employee development.
• Travel expectation: 0%–25%.