Pre-Silicon IP System Validation Intern (Hardware)

TL;DR

Pre-Silicon IP System Validation Intern (RTL/FPGA): Performing functional validation of Soft IPs and subsystems using FPGA-based prototyping and emulation with an accent on environment bring-up and hardware-software interaction. Focus on executing RTL functional tests, troubleshooting silicon failures, and conducting root-cause analysis.

Location: Hybrid (Penang, Malaysia)

Company

hirify.global is a global leader in semiconductor manufacturing, with the Central Engineering Group (CEG) focusing on scalable engineering solutions across IP, Custom ASIC, and Foundry Enablement.

What you will do

• Execute functional tests on latest generation IP RTL to ensure design requirements are met.
• Assist in the bring-up of validation environments for Soft IP or Subsystems.
• Perform first-line debugging and troubleshooting to assist in failure root-cause analysis.
• Utilize FPGA-based early prototyping and emulation validation hardware.
• Document and report findings from validation tests and failure analysis.

Requirements

• Final year or 3rd year student pursuing a Bachelor's Degree in Electrical, Electronic, Computer Engineering, or Computer Science.
• Strong knowledge of computer system architecture.
• Understanding of subsystem HW/SW stacks, including onboard components and device drivers.
• Experience with Python, C, and/or C++ programming.
• Must be based in or able to work from the Penang, Malaysia site under a hybrid model.

Culture & Benefits

• Opportunity to work on cutting-edge Soft IPs for Client, Server, and Custom ASIC solutions.
• Hybrid work model allowing employees to split time between on-site and off-site work.
• Integration into a data-driven engineering organization focused on high-impact, short-cycle development.