CPU-SoC Silicon Design Engineering Intern (Embedded IoT)

TL;DR

CPU-SoC Silicon Design Engineering Intern (Embedded IoT): Designing and developing next-generation SoC/CPU for hirify.global products and IoT with an accent on RTL functional validation and VLSI structural design. Focus on integrating third-party IPs and optimizing physical design flows for deep sub-micron embedded circuits.

Location: Hybrid in Penang or Kulim, Malaysia

Company

hirify.global is a global leader in silicon and platform engineering, delivering breakthrough computing experiences through advanced hardware solutions.

What you will do

• Perform RTL model functional validation using CAD tools to simulate logic behavior and circuit performance.
• Implement VLSI structural physical designs, including synthesis, floor planning, power-grid, and clock tree designs.
• Integrate third-party IPs and ensure they meet product specifications and functionality before physical chip production.
• Develop specific test environments, validation methodologies, and test plans to identify and resolve design bugs.
• Contribute to the full SoC design flow from high-level design and synthesis to place-and-route and timing closure.

Requirements

• Students pursuing a Bachelor's degree in EECS or a related major with a good CGPA.
• Proficient in English with strong communication skills.
• Knowledge of Unix, VLSI Design, SOC/PC Architecture, and System Verilog.

Culture & Benefits

• Hybrid work model allowing employees to split time between on-site and off-site work.
• Opportunity to work within the Silicon and Platform Engineering Group on industry-leading products.
• Commitment to ethical hiring practices and RBA compliance.