IP Design Verification Engineer (Mixed Signal)

TL;DR

IP Design Verification Engineer (Mixed Signal/UVM): Ensuring the functionality and performance of mixed signal semiconductor components with an accent on verification plans, test benches, and analog behavioral modeling. Focus on debugging presilicon bugs, optimizing coverage metrics, and implementing PCIe/UCIe protocols.

Location: On-site presence required in Phoenix (AZ), Folsom (CA), Santa Clara (CA), or Hillsboro (OR)

Salary: $141,910–$200,340 USD

Company

hirify.global is a global leader in semiconductor innovation, utilizing its Central Engineering Group to build scalable engineering solutions and custom ASIC products.

What you will do

• Develop and execute comprehensive mixed-signal IP verification plans to ensure designs meet rigorous specifications.
• Create and maintain test benches and verification environments using advanced methodologies such as UVM and OVM.
• Perform analog behavioral modeling to validate design functionality, timing, and power objectives.
• Identify, replicate, and debug presilicon bugs and drive corrective measures to ensure product reliability.
• Analyze coverage metrics to ensure verification completeness and propose necessary improvements.
• Collaborate across disciplines to refine verification strategies and optimize overall design excellence.

Requirements

• Bachelor's degree in Electrical/Computer Engineering (4+ years exp), Master's (3+ years), or PhD.
• 3+ years of experience with System Verilog, Verilog, and verification methodologies (UVM/OVM).
• Proficiency with industry-standard EDA tools such as Synopsys VCS, Cadence Xcelium/JasperGold, or Mentor Questa.
• Experience in analog behavioral modeling, high-speed IO IP verification, or low-power validation.
• Knowledge of PCIe and/or UCIe protocols.
• Must be based in or able to work on-site in the specified US locations (Arizona, California, or Oregon).

Nice to have

• Experience collaborating in cross-functional environments to solve complex technical problems.
• Proven ability to execute tasks with discipline and deliver results under tight timelines.
• Excellent written and verbal communication skills for documenting and presenting technical concepts.

Culture & Benefits

• Total compensation package including competitive pay and stock bonuses.
• Comprehensive benefit programs covering health, retirement, and vacation.
• Professional growth opportunities within a world-leading semiconductor organization.
• Commitment to ethical hiring practices and RBA compliance.