Graduate Talent (Analog Design Engineer)

TL;DR

Graduate Talent (Analog Design Engineer): Supporting memory PHY development through package layout, electrical modeling, and signal/power integrity simulation with an accent on IC design and platform architectures. Focus on collaborating with engineering teams to deliver scalable solutions within the Central Engineering Group.

Location: Must be based in or able to work on-site in Penang or Kulim, Malaysia

Company

hirify.global is a global leader in semiconductor manufacturing and technology innovation, providing scalable engineering solutions across product and foundry businesses.

What you will do

• Support memory PHY development across various technical domains.
• Perform electrical modeling and signal/power integrity simulations.
• Assist with package layout tasks and platform architecture design.
• Collaborate with cross-functional teams to deliver engineering solutions.
• Contribute to data-driven engineering methodologies within the Central Engineering Group.

Requirements

• BSEE degree with relevant or adjacent education syllabus focus.
• Basic understanding of IC design and package/platform architectures.
• Foundational knowledge of signal and/or power integrity.
• Strong communication skills and ability to work effectively in a team.
• Must be able to work on-site in Malaysia (Penang/Kulim) as part of a hybrid work model.

Nice to have

• Exposure to package or board layout tools.
• Experience with 3D modeling tools.
• Practical experience in electrical validation.

Culture & Benefits

• Hybrid work model allowing flexibility between on-site and off-site work.
• Opportunity to work within a large-scale, data-driven engineering organization.
• Commitment to ethical hiring practices and RBA compliance.
• Inclusive work environment with equal opportunity employment policies.