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11 часов назад

Analog Mixed Signal Design Engineer (SerDes)

129 740 - 183 170CAD
Формат работы
remote (только Canada)/hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Canada
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TL;DR

Analog Mixed Signal Design Engineer (SerDes): Developing and verifying next-generation mixed-signal IP with an accent on static timing analysis and analog-digital interface closure. Focus on optimizing circuit performance, building complex testbenches, and advancing verification methodologies using Cadence ADE and behavioral modeling.

Location: Must be based in the greater metropolitan area of Toronto, Ontario. The role is currently remote but will transition to a hybrid model (4 days/week on-site) once the new office is operational.

Salary: CAD 129,740–183,170

Company

A global leader in semiconductor technology and computing innovation.

What you will do

  • Lead static timing analysis (STA) for mixed-signal designs to ensure robust timing closure.
  • Execute analog circuit design tasks including simulation setup and schematic optimization.
  • Perform comprehensive mixed-signal verification using behavioral modeling and timing analysis.
  • Debug complex testbenches and conduct root-cause analysis of pre-silicon design challenges.
  • Develop behavioral models and automation scripts to improve simulation efficiency.
  • Collaborate with cross-functional teams including digital architects, RTL, and physical design engineers.

Requirements

  • Must be based in the greater metropolitan area of Toronto, Ontario.
  • Bachelor's degree in Electrical or Computer Engineering or a STEM-related field.
  • 2+ years of industry experience in mixed-signal verification and methodology development.
  • 2+ years of experience with scripting languages such as Python for automation.
  • Strong analytical, problem-solving, and communication skills.

Nice to have

  • Post-graduate degree in Electrical or Computer Engineering.
  • Experience with SerDes or PLL mixed-signal systems.
  • Proficiency with Cadence ADE for simulations and debugging.
  • Experience with analog behavioral modeling (Verilog-A, SystemVerilog).
  • Experience with AI-driven script development and automation.

Culture & Benefits

  • Opportunity to work on industry-leading silicon products.
  • Collaborative environment with access to advanced engineering tools and methodologies.
  • Commitment to accessibility and inclusive hiring practices.
  • Hybrid work model supporting flexibility once the local office is operational.

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