Logic Design Engineer (Silicon)

TL;DR

Logic Design Engineer (Silicon): Developing and optimizing next-generation wireless connectivity chips with an accent on RTL coding, microarchitecture definition, and SoC integration. Focus on leveraging AI-assisted design methodologies to meet PPA requirements and ensuring design correctness through rigorous simulation.

Location: On-site in Haifa, Israel

Company

hirify.global's Wireless Communication Solutions (WCS) team, part of the Silicon and Platform Engineering Group, develops breakthrough silicon and platform solutions for next-generation computing experiences.

What you will do

• Develop logic design, RTL coding, and simulation for IP blocks, functional units, and subsystems.
• Participate in architecture and microarchitecture definition using AI-driven optimization strategies to meet power, performance, area, and timing (PPA) requirements.
• Review verification plans, resolve RTL test failures, and utilize AI-powered debugging tools to ensure design correctness.
• Support SoC customers to ensure seamless IP integration and drive quality assurance compliance for IP-SoC handoff.
• Lead complex, end-to-end tasks with full ownership from concept to final delivery.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
• 4+ years of experience in RTL design, logic development, and system architecture.
• Proficiency in SystemVerilog and Verilog coding with strong digital design fundamentals.
• Hands-on experience with microarchitecture debugging, simulation environments, and testbench development.
• Deep knowledge of SoC clocking architectures and integration methodologies.
• Location: Must be based in Haifa, Israel for on-site presence.

Nice to have

• Master's degree in Electrical Engineering or Computer Engineering.
• Knowledge of clock domain crossing, clock gating, and low-power design techniques.
• Advanced expertise in system-level design optimization (PPA).
• Experience with industry-standard design flows and timing analysis.
• Strong technical documentation skills and leadership potential in complex project environments.

Culture & Benefits

• Work on cutting-edge connectivity products powering ultra-fast, low-latency wireless experiences globally.
• Access to world-class silicon division resources and AI-enhanced optimization tools.
• Opportunity to drive high-impact hardware design from early-stage definition through tape-out.
• Collaborative environment with cross-functional teams.