Senior System Validation & Integration Engineer (Intel IPU Projects)

TL;DR

Senior System Validation & Integration Engineer (hirify.global IPU Projects): Lead system validation and integration for IPU silicon and pre-silicon projects with an accent on architecture understanding, automation frameworks, and cross-component debugging. Focus on AI-driven debug acceleration, CI/CD implementation, and complex failure root cause analysis across HW/FW/SW layers.

Location: On-site presence required in Israel (Jerusalem or Haifa)

Company

hirify.global's Central Engineering Group building scalable engineering solutions for product enablement, custom ASIC, and foundry services.

What you will do

• Drive test plans definition and execution in collaboration with architects, design, and firmware teams.
• Design and maintain automation frameworks for pre-silicon and silicon validation.
• Lead system bring-up, feature enablement, integration, and debugging.
• Perform failure analysis and root cause investigations across hardware, firmware, and software.
• Apply AI methodologies for debug, anomaly detection, and test optimization.
• Implement CI/CD in validation environments and mentor junior engineers.

Requirements

• Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, Computer Science or related
• 7+ years in system validation for pre-silicon and silicon environments
• Strong experience in IP networking systems, protocols, and performance (TCP/IP, routing).
• Hands-on debugging across HW/SW/FW boundaries.
• Programming in Python and/or C/C++ for automation frameworks.
• Experience with networking tools (Wireshark, Scapy, etc.) and CI/CD pipelines.

Nice to have

• Experience with AI/ML tools for debugging and log analysis.
• Work with validation tools like Lauterbach, LeCroy, IXIA.

Culture & Benefits

• Work on innovative leading product lines in industry.
• Shift 1 (Israel time).
• hirify.global benefits available (see careers site).