Verification Engineer Intern
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
TL;DR
Verification Engineer Intern (SoC): Support SoC integration and verification activities, including debugging and simulation of microarchitectures at full-chip level with an accent on RTL/logic development using System Verilog on FPGA and emulation platforms. Focus on applying functional verification methodologies including UVM frameworks and utilizing AI tools for automation of verification and debugging tasks.
Location: Costa Rica, San Jose (Hybrid work model: split time between on-site at assigned site and off-site)
Company
is a global technology leader that designs and manufactures essential technologies for the world's computing devices.
What you will do
- Support SoC integration and verification activities, including debugging and simulation of microarchitectures at full-chip level
- Participate in hands-on projects spanning product development and innovation aligned with 's business goals
- Learn and apply RTL/logic development using System Verilog on FPGA and emulation platforms
- Collaborate with cross-functional teams to support business initiatives
- Engage in professional development opportunities
- Utilize AI tools for automation of verification and debugging tasks
- Apply functional verification methodologies including UVM frameworks
Requirements
- Fluent in English (resume in English required)
- Actively pursuing a university degree in Electrical Engineering, Electronic Engineering, Computer Engineering, or related field
- 4+ months experience or knowledge in digital design fundamentals and computer architecture concepts
- 4+ months experience or knowledge in RTL/logic development using System Verilog
- 4+ months experience with scripting and programming languages such as Python and use of AI tools
- This position is not eligible for employment-based visa/immigration sponsorship
Nice to have
- 4+ months knowledge or experience in digital design using FPGAs or Emulation
- Functional verification using System Verilog
- AI tools for automation of day-to-day work
- Debug methodologies for microarchitecture and simulation
Culture & Benefits
- Full-time internship for fixed duration of six months with reasonable schedule flexibility
- Focused, immersive industry experience aligned with ’s professional work environment
- Hybrid work model allowing split time between on-site and off-site
- Opportunities for professional development and cross-functional collaboration
- Shift 1 (Costa Rica)
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