SoC/Top Design Engineer (AI)

Location: On-site in Jeongja-dong, Bundang-gu, Seongnam, South Korea

Company

hirify.global develops AI semiconductor products and complex SoC projects.

What you will do

• Design SoC top-level architecture and integrate RTL.
• Integrate CPU, AI, and memory subsystems and define bus interconnects.
• Manage clock, reset, and power domains alongside verification environments.
• Conduct synthesis, timing, and power analysis to optimize performance.
• Collaborate with backend and verification teams on design closure and tape-out.
• Support DFT and functional verification activities.

Requirements

• At least 5 years of experience in RTL design and SoC integration.
• Hands-on knowledge of Verilog, SystemVerilog, and AMBA AXI/AHB protocols.
• Proficiency with EDA tools and SoC design flows including synthesis, P&R, STA, and ECO.
• Strong attention to design quality, analytical thinking, problem-solving, and cross-team communication.

Nice to have

• CPU, GPU, or NPU IP integration experience.
• Experience with low-power and high-speed design.
• Familiarity with UVM-based verification environments.
• Python or TCL scripting skills and experience with Linux-based development environments.

Culture & Benefits

• Cross-functional collaboration with backend and verification teams.
• Hiring process includes document screening, online interview, on-site interview, culture-fit interview, compensation discussion, and final decision.