Cache Senior Design Engineer (AI)

TL;DR

Cache Senior Design Engineer (AI): Designing and implementing IP solutions for cutting-edge AI products with an accent on cache systems, block-level design, and backend-RTL optimization. Focus on solving complex timing paths, restructuring components for area reduction, and ensuring the quality and performance of IP designs.

Location: Hybrid in Petah-Tikva, Israel. This position is expected to change location in the near future to the Petah Tikva campus.

Company

hirify.global's Chief Technology Office, Artificial hirify.globalligence, and Network and Edge Group (CTO AI NEX) is dedicated to strategically penetrating the AI market by delivering disruptive solutions and driving the software-defined transformation of networks.

What you will do

• Design and implement IP solutions.
• Collaborate with cross-functional teams.
• Ensure the quality and performance of IP designs.
• Focus on cache systems and block-level design for AI products.

Requirements

• B.Sc. in Electrical Engineering or Computer Engineering.
• At least 10 years of proven experience in Block Level design.
• At least 3 years of proven experience in Cache systems.
• Proficiency in System Verilog.
• Experience with Backend-RTL skills including solving timing paths, restructuring components, and area reduction.
• Strong analytical and problem-solving skills.
• Work Model: Hybrid, requiring presence at the hirify.global Petah Tikva site.

Culture & Benefits

• Be a major contributor to hirify.global's IP Design team for the AI industry.
• Be part of the Chief Technology Office, Artificial hirify.globalligence, and Network and Edge Group (CTO AI NEX).
• Work on disruptive and transformative solutions for the AI market.
• Eligible for a hybrid work model allowing split time between on-site and off-site.