Senior Principal Digital IC Design Engineer (Semiconductor)

TL;DR

Senior Principal Digital IC Design Engineer: Contributing to the development of cutting-edge hardware solutions, designing and implementing world-class ASICs for industry-leading customers with an accent on SoC-level specifications and micro-architecture specifications. Focus on RTL development and integration, verification plans, and post-silicon validation.

Location: Must be located in Santa Clara, CA

Salary: 182,360 - 273,200 USD per annum

Company

hirify.global’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.

What you will do

• Collaborate with systems and architecture teams to define SoC-level specifications, including performance, power, area, and feature requirements.
• Translate high-level product requirements into detailed micro-architecture specifications for subsystems and IP blocks.
• Lead RTL development and integration, ensuring modularity, reusability, and compliance with design guidelines.
• Create modular and reusable design components to support scalable and maintainable architectures.
• Partner with DV teams to define and review verification plans, including functional, coverage-driven, and power-aware strategies.
• Support pre-silicon bring-up activities, including FPGA prototyping and emulation.

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering, or related fields with 15+ years of professional experience, or Master’s/PhD with 10+ years of experience.
• Minimum of 10 years of industry experience in developing, implementing, and testing high-performance communications ASIC products.
• Extensive experience in RTL design, including verification, synthesis, and timing closure.
• Strong background in embedded microcontroller systems.
• Proficiency with UNIX-based EDA tools and deep understanding of ASIC design flows.
• Familiarity with PHY/MAC layer communication protocols such as Ethernet, PCIe, UA Link, SUE, or ESUN.

Nice to have

• Knowledge of signal processing circuit structures or error-correcting code architectures.
• Experience with industry-standard interfaces such as MDIO, I2C, I3C, SPI, and SMBus.

Culture & Benefits

• Employee stock purchase plan with a 2-year look back.
• Family support programs to help balance work and home life.
• Robust mental health resources to prioritize emotional well-being.
• Recognition and service awards to celebrate contributions and milestones.

Hiring process

• Candidates are not permitted to use AI tools during interviews.
• Interviews are designed to evaluate your individual experience, thought process, and communication skills in real time.
• Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.