System Design and Silicon Validation Intern (Connectivity)

TL;DR

System Design and Silicon Validation Intern (Connectivity): Developing and validating high-performance evaluation boards and reference designs for next-generation datacenter products with an accent on signal/power integrity analysis, component selection, and board bring-up. Focus on validating and optimizing silicon performance using real hardware platforms and contributing to bench automation.

Location: Onsite in Ho Chi Minh, Vietnam

Company

hirify.global develops semiconductor solutions that are essential building blocks for the data infrastructure connecting our world, enabling new possibilities across enterprise, cloud, AI, and carrier architectures.

What you will do

• Support the design and development of validation and evaluation boards for silicon bring-up and characterization.
• Participate in the full hardware design cycle, including circuit development, BOM selection, schematic capture, and layout considerations.
• Assist with board bring-up and bench testing using lab instruments like oscilloscopes and signal generators.
• Collect and analyze bench data to support post-silicon validation, characterization, and debug.
• Contribute to bench automation using Python for repeatable measurements and data capture.
• Write clear technical documentation such as test notes and lab reports.

Requirements

• Currently enrolled in a Bachelor’s or Master’s program in Electrical Engineering, Computer Engineering, or a related field.
• Solid fundamentals in electronics, analog, and mixed-signal concepts.
• Exposure to or strong interest in high-speed design topics like signal integrity and PCB layout concepts.
• Basic understanding of silicon validation methodology and lab debug flow.
• Programming experience in Python and/or MATLAB for data analysis and automation.
• Familiarity with schematic capture tools.
• English: B2 required for clear written/verbal communication.

Nice to have

• Familiarity with IEEE 802.3 standards or datacenter interconnect ecosystems.
• Prior project experience with SerDes systems, high-speed boards, or hardware bring-up.
• Hands-on experience with lab equipment.

Culture & Benefits

• Opportunity for real project experience in one of the world’s leading chip design environments.
• Exposure to hirify.global’s core technologies, toolchains, and product workflows.
• Mentorship path that could evolve into a full-time role or thesis opportunity.
• Competitive compensation and benefits within an environment of shared collaboration, transparency, and inclusivity.
• Tools and resources to succeed and grow with the company.

Hiring process

• Candidates are not permitted to use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
• Interviews are designed to evaluate individual experience, thought process, and communication skills in real time.
• Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.