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6 дней назад

High Speed Serdes System Design Engineer (DSP)

108 000 - 192 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

High Speed Serdes System Design Engineer (DSP): Designing and verifying advanced signal processing algorithms for high-speed Serdes products (100G+) at the physical layer, involving PAM, adaptive equalizers, and FEC. Focus on defining Serdes architecture, developing system models in MATLAB/C++, and collaborating with analog/digital designers for successful implementation in advanced silicon technologies.

Location: Onsite in Austin, TX or Irvine, CA, USA

Salary: $108,000–$192,000 annual base salary

Company

hirify.global is a global technology leader designing, developing, and supplying a broad range of semiconductor and infrastructure software solutions.

What you will do

  • Develop channel models and simulations to define Serdes architecture.
  • Define signal processing block requirements, architecture, and lab test plans.
  • Develop bit-exact MATLAB and C/C++ system models for simulation and verification.
  • Collaborate closely with analog and digital designers for algorithm implementation in silicon.
  • Develop, test, and debug firmware associated with physical layer functionality.
  • Perform lab testing and debug of Serdes, and provide customer support.

Requirements

  • B.S.E.E. with 8+ years or M.S.E.E. with 6+ years of relevant experience.
  • Expert knowledge in Communication Theory and Digital Signal Processing algorithms.
  • Working knowledge of Analog circuit behavior, Transmission line theory, and s-parameter.
  • Expertise in MATLAB and C/C++ programming.
  • Good hands-on skills in the lab.
  • English: B2 required.
  • Work authorization for USA required.

Nice to have

  • Experience in designing high-speed Clock and Data Recovery (CDR) PLLs.
  • Experience in equalization techniques for wireline communication applications.
  • RTL coding experience.
  • Knowledge of IEEE 802.3/OIF Serdes and PCIe Gen6/Gen7 standards.

Culture & Benefits

  • Competitive and comprehensive benefits package including Medical, dental, and vision plans.
  • 401(K) participation including company matching.
  • Employee Stock Purchase Program (ESPP).
  • Employee Assistance Program (EAP).
  • Company paid holidays, paid sick leave, and vacation time.

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