TL;DR

Silicon Microarchitecture Engineer (AI): Contributing to the development of groundbreaking silicon for machine learning acceleration with an accent on high-performance machine learning accelerator architecture, micro-architecture, and RTL design. Focus on exploring trade-offs of future architecture designs in terms of performance, power, energy, and area.

Location: Mountain View, California, US

Company

%hirify_global% is a team of scientists, engineers, and machine learning experts working together to advance the state of the art in artificial intelligence.

What you will do

Participate in high-performance machine learning accelerator architecture, micro-architecture, and RTL design.
Select and integrate in-house and third-party IP.
Explore trade-offs of future architecture designs in terms of performance, power, energy, and area.
Participate in the system architecture definition and evaluation.
Collaborate with simulation and PD teams to maintain up-to-date cost functions for architecture evaluation.
Coordinate chip design collaboration across teams.

Requirements

Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
7+ years of experience in RTL design in Verilog/System Verilog.
5+ years of experience in micro-architecture definition.
3+ years of experience in RTL design verification.
Experience with high-performance compute IPs (e.g., GPUs, DSPs, or machine learning accelerators).
Good understanding of ASIC design flow including RTL design, verification, logic synthesis, and timing analysis.

Nice to have

Working experience developing with C++ & Python.
Physical Design or Design Verification background.
Knowledge/understanding of high-level synthesis.
Working knowledge of transformer-based large language models.
Knowledge of high performance and low power architectures for ML acceleration.
Knowledge of processor core SoC integration.

Culture & Benefits

Value diversity of experience, knowledge, backgrounds, and perspectives.
Committed to equal employment opportunity.
Accommodations available for disabilities or additional needs.