TL;DR

Principal Engineer (Emulation/FPGA): Architecting and implementing advanced emulation and FPGA methodologies for next-generation SoC and system functional validation with an accent on full-system and In-Circuit Emulation using Cadence Palladium. Focus on driving shift-left initiatives, ensuring robust readiness, and influencing future architecture decisions for complex designs.

Location: On-site in US (Santa Clara, Hillsboro, Folsom, or Austin)

Salary: $214,730–$303,140 USD

Company

%hirify_global% is a corporation focused on delivering exceptional data center products, Xeon-based solutions, and custom x86-based products, driving innovation in general-purpose compute, web services, HPC, and AI-accelerated systems.

What you will do

Architect and optimize state-of-the-art emulation and FPGA strategies for functional validation.
Lead early validation methodologies to reduce time-to-market and ensure scalability.
Collaborate with pre-silicon, post-silicon, platform, and customer co-validation teams for seamless integration.
Drive test-plan reviews, define validation strategies, and create high-quality collateral.
Influence architecture decisions and validation flows that shape future complex SoC and system designs.

Requirements

Bachelors Degree in Computer Engineering or Computer Science or Electrical Engineering with 10+ years of experience.
8+ years of experience in SoC design for In-Circuit Emulation or FPGA.
Strong background in validation functional and debug collaterals (transactors, trackers/checkers/monitors, coverage, test stimulus).
Hands-on experience with pre-silicon and post-silicon validation environments.
Experience in emulation flow, debug methodologies, or testbench development.
Experience in commercial emulation platforms.

Nice to have

Working knowledge with PCIE Gen6 speed-bridges and memory technologies (DDR, LPDDR).
Strong software programming skills, proficient in C and/or C++, familiar with Linux/UNIX based development environments, tools, and script languages such as Perl, TCL/TK.

Culture & Benefits

Competitive total compensation package, including competitive pay, stock, and bonuses.
Comprehensive benefit programs which include health, retirement, and vacation.
Opportunity to join a cutting-edge validation team and drive future emulation technologies for next-generation SoCs.
Work in a cross-site team environment with excellent problem-solving and communication skills.

Hiring process

This role is a Position of Trust, requiring consent to and passing an extended Background Investigation.

ICE (In-Circuit Emulation) Technology and Model Development Principal Engineer