Назад
Company hidden
обновлено 14 часов назад

Verification Engineer (AI SoC)

141 910 - 200 340$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/

TL;DR

Verification Engineer (AI/SoC): Building and optimizing next-generation ASICs for AI applications across edge and cloud with an accent on functional correctness of complex digital designs. Focus on defining and developing scalable verification plans, test benches, and environments to meet coverage levels and conform to microarchitecture specifications.

Location: Hybrid (US). This role allows employees to split their time between working on-site at assigned hirify.global sites in Folsom (CA), Hillsboro (OR), Santa Clara (CA), or Austin (TX) and off-site.

Salary: $141,910.00–200,340.00 USD

Company

hirify.global is a leading corporation building next-generation ASICs for AI applications, inventing at the boundaries of technology to enable amazing experiences for business and society.

What you will do

  • Perform digital ASIC verification at block and system level.
  • Develop and execute verification plans; write and review test sequences.
  • Build SystemVerilog testbench infrastructure (UVM and non-UVM) for functional verification.
  • Run regressions, analyze results, and drive code and functional coverage closure.
  • Collaborate with SoC architects, microarchitects, RTL developers, and postsilicon teams to debug and resolve issues.
  • Maintain and improve existing functional verification infrastructure and methodology.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • 4+ years of experience in ASIC/SoC verification.
  • Ability to work in a fast-paced environment and adapt to changing requirements.
  • Strong problem-solving skills and eagerness to learn.

Nice to have

  • Knowledge of SystemVerilog and UVM methodology.
  • Understanding of digital design fundamentals and verification concepts.
  • Familiarity with EDA tools: simulators (VCS, Questa), coverage tools, and waveform debug.
  • Basic scripting skills (Python, Perl, TCL) for automation.

Culture & Benefits

  • Hybrid work model, allowing split time between on-site and off-site work.
  • Total compensation package including competitive pay, stock bonuses, and comprehensive benefit programs.
  • Benefits include health, retirement, and vacation.
  • Commitment to Responsible Business Alliance (RBA) compliance and ethical hiring practices.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →

Текст вакансии взят без изменений

Источник - загрузка...