TL;DR

Formal Verification Architect: Conducts formal verification of IP and SoC microarchitecture using model checking and equivalence checking algorithms with an accent on developing comprehensive test and coverage plans. Focus on creating formal proofs, resolving BDD complexity, and improving verification methodologies for complex architectural features.

Location: Onsite in Penang, Malaysia

Company

%hirify_global%'s Data Center Group delivers Xeon-based and custom x86 solutions for compute, web services, HPC, and AI-accelerated systems, focusing on product management and leading x86 innovation.

What you will do

Conduct formal verification of IP and SoC microarchitecture using various tools and methodologies.
Create comprehensive formal verification test and coverage plans.
Develop formal proofs and new formal verification methodologies.
Perform convergence on design using abstraction and simulation techniques.
Collaborate with architects, RTL developers, and physical design teams.
Document test plans and drive technical reviews.

Requirements

Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science or related field with 9+ years experience, OR Master's with 6+ years, OR PhD with 4+ years.
Experience with RTL languages (System Verilog or VHDL) and assertion languages (SVA).
Familiarity with formal verification technology fundamentals, model checking, and writing formal assertions.
Knowledge of computer architecture, digital design, and verification methods.
Ability to understand BDD and DFG for data paths and resolve BDD complexity.
Work Model: On-site presence required.

Nice to have

Research experience in the formal verification domain.

Culture & Benefits

Commitment to delivering exceptional products and delighting customers.
Focus on workload-driven leadership products and partner collaboration.
Equal employment opportunity.
Role requires consent to and passing an extended Background Investigation.