Performance Engineer (AI/HPC)

Location: Hybrid, three days per week in person at the Cambridge, MA office; candidates must be authorized to work in the United States.

Company

hirify.global is a startup building AI systems and infrastructure to discover and commercialize new physics at scale.

What you will do

• Own workload performance end to end across application code, data paths, schedulers, containers, services, and GPU kernels.
• Specify, generate, write, verify, and profile GPU kernels for physics campaigns and learned models.
• Develop deep expertise in multi-node AI training, inference serving at scale, or HPC simulation at scale while learning the other areas.
• Measure real cluster workloads and use observed data to inform queue policy and capacity decisions.
• Leave benchmarks and before-and-after traces documenting verified performance improvements.
• Own work from specification through shipping and on-call support.

Requirements

• 3+ years of whole-stack performance engineering experience, improving workloads across more than one layer and validating results on real workloads.
• 3+ years of systems programming experience with the ability to read, modify, and verify C++, CUDA, or Triton code.
• Experience using profilers and performance tools including Nsight Systems, Nsight Compute, torch profiler, perf, or NCCL tests.
• Understanding of memory hierarchy, occupancy, and roofline analysis.
• Scale experience in at least one area: multi-node AI training, inference serving, or HPC simulation, with willingness to learn the others.
• For AI training: distributed throughput, collective communication, InfiniBand topology, sampler and trainer placement, and step-time analysis.
• For inference: vLLM, SGLang, or comparable systems; multi-GPU mixture-of-experts placement; KV-cache, quantization, latency, and throughput trade-offs.
• For HPC: CFD, molecular dynamics, multiphysics, or comparable codes; MPI scaling; GPU solver kernels; FP64 and extended-precision numerics.
• U.S. work authorization is required. Export-control eligibility may also require U.S. person status or eligibility for required U.S. government authorization.

Nice to have

• Self-written CUDA C++ or Triton kernels used by other systems.
• Experience across a second performance lane.
• Source-level work in OpenFOAM, LAMMPS, GROMACS, or comparable codes, and PETSc, Trilinos, MAGMA, or comparable libraries.
• Experience with Kueue or Slurm queue policy on a shared cluster, supported by before-and-after measurements.
• Experience turning research code into a maintained library used by scientists.

Culture & Benefits

• Full ownership from specification to shipping and on-call.
• Contracts are written before logic, and systems are tested against real environments rather than mocks.
• Simple designs that ship are preferred over unnecessary complexity.
• AI-native development with daily use of agentic coding tools and specifications legible to people and agents.
• Competitive compensation including salary, benefits, and meaningful early-stage equity.
• Equal opportunity workplace that values diverse perspectives.

Hiring process

• Evaluation focuses on whole-stack performance ownership, low-level AI and HPC fluency, measurement discipline, and shipping velocity.
• Employment visa sponsorship is not available now or in the future.